Mask for producing rectangular openings in a substrate

ABSTRACT

A method of fabricating a mask forms a rectangular opening within etch resistant material that overlays a substrate. The mask preferably comprises two layers of photoresist separated by a layer of light blocking material. One of the layers of photoresist is patterned per a longitudinal exposure strip, and the other per an overlap of a lateral exposure strip with the longitudinal exposure strip, so as to provide an opening for the mask where the two overlap. With this mask over a substrate, the substrate is etched to form a container therein with a rectangular cross-section corresponding to the aperture of the mask. The container is then lined with electrically conductive material, dielectric, and electrically conductive material respectively to form a capacitor in the container—e.g., a container-cell capacitor for a DRAM device.

BACKGROUND OF THE INVENTION

[0001] The present invention relates to a mask suitable for use informing a container in a substrate, and more specifically to a maskhaving a fine geometry, rectangular opening that may be utilized to etcha substrate and define an opening or hole therein having an outlinecorresponding to the rectangular opening of the mask. Additionally, thepresent invention relates to a container-cell capacitor for a dynamicrandom access memory (DRAM).

[0002] An exemplary prior art dynamic random access memory (DRAM) devicecomprises an array of container-cell capacitors that are formed in asubstrate. In the current application, the term “substrate” or“semiconductor substrate” will be understood to mean any constructioncomprising semiconductor material, including but not limited to bulksemiconductive materials such as a semiconductor wafer (either alone orin assemblies comprising other materials thereon), and semiconductivematerial layers (either alone or in assemblies comprising othermaterials). Further, the term “substrate” also refers to any supportingstructure including, but not limited to, the semiconductive substratesdescribed above. One known container structure for the container-cellcapacitors a memory array, comprises a container having a cylindrical or“bath-tub” shape. In a known method of fabricating a container in asubstrate, with reference to FIGS. 1-3, a single layer of photoresist 12is coated over layer 10 of, for example, borophosphosilicate glass(BPSG). Light 14, such as ultraviolet light, irradiates a select region16 of photoresist 12 as determined by an exposure plate or reticle (notshown). Advancing to FIG. 2, photoresist 12 is developed to form opening18. Opening 18 exposes surface 20 of layer 10. With this mask 12, layer10 can be etched (e.g., by a reactive plasma etch) to form container 19within layer 10, see FIG. 3. As used herein, the term “container” shallbe inclusive of similar structural descriptors such as void, pocket,hole, contact opening, via and the like. A radius of curvature r₁ of thecontainer corresponds to the radius of curvature of opening 18 of mask12. To form a capacitor, container 19 is lined with first conductivematerial, dielectric, and second conductive material layersrespectively.

[0003] In order to minimize costs, manufactures of DRAM's strive toreduce the dimensions of the container-cell capacitors and increase thedensity of such cells within the array. Accordingly, some have developeda container-cell capacitor having a primarily rectangular cross-sectionfor providing increased capacitance without sacrificing cell density.Referencing FIGS. 4A and 4B, such exemplary prior art container 19comprises a cross-section of rectangular outline 23 offering an increasein the area of the container walls. This increased area, in-turn,increases electrode area and capacitance value of the container-cellover that which might otherwise be provided by an equivalent widthcylindrical container 18.

[0004] In a prior art method of forming a mask with a rectangularaperture, referencing FIGS. 5A and 5B, insulating material 10, e.g.,BPSG, is layered over a silicon wafer of a supporting substrate 21. Etchresistant material 96 is layered over insulating material 10. Etchresistant material 96 is capable of resisting an etchant that is usedduring subsequent etching of insulating material 10, and may comprise,e.g., nitride of about 1,000 angstroms thickness. Photoresist (notshown) is layered over the top of etch resistant material 96 andpatterned to define lateral apertures therein. The lateral apertures ofthe photoresist are used to define lateral openings 100 into etchresistant material 96. After forming lateral openings 100 in etchresistant material 96, the first photoresist is removed.

[0005] Continuing with this particular, exemplary, prior art method,additional photoresist 94 is applied over the patterned etch resistantmaterial 96. This new photoresist is patterned to define longitudinalopenings 106 that overlap lateral openings 100, thereby definingrectangular openings 18 (FIG. 5B) at overlapping regions. Thereafter,select regions of substrate 21 are processed or etched in accordancewith the openings to define containers 19. In this exemplary prior artmethod of forming a rectangular opening for a mask, the secondphotoresist is layered over the substrate and processed only after thefirst, lower photoresist has been fully processed. In other words, thelower photoresist is processed first, and only then is the upper layerof photoresist coated thereover and processed.

[0006] After forming this mask opening, the substrate is etched inaccordance with the rectangular opening of the patterned photoresist andlower mask material, so as to provide a container within the substratehaving primarily a rectangular cross-section corresponding to therectangular opening of the mask.

[0007] In the above, exemplary, prior art method of forming a mask witha rectangular aperture, the upper photoresist is applied to thesubstrate only after the lower mask material has already been processedto define the lateral opening therein. In other words, the exemplaryprior art sequence of steps comprises, in general, processing the firstmask material, applying photoresist over the first mask material,followed by processing the photoresist. With this sequence of steps, thesubstrate is moved from, firstly, an etch or development stationassociated with processing the first mask material; to, secondly, aphotoresist coat station for applying the photoresist over the processedmask material; and then back to, thirdly, an etch or resist developmentstation to define the longitudinal openings in the photoresist.Recognizing a need in the manufacture of semiconductors to reducehandling and travel of wafers during semiconductor production flows, soas to reduce the time and costs associated with such wafer transport,the present invention proposes a new mask and method of manufacturethereof that can provide for effective and efficient semiconductorproduction flows.

[0008] Accordingly, the present invention provides a new mask and methodof manufacture thereof, for use in forming a container for acontainer-cell capacitor having a rectangular cross-section, which maskand method of manufacture are capable of overcoming some of the abovelimitations. Furthermore, an array of containers are formed in asubstrate by etching a substrate in accordance with fine geometryopenings of such mask, providing for an efficient process flow.

SUMMARY OF THE INVENTION

[0009] In accordance with a first embodiment of the present invention, amethod of forming a mask comprises layering radiation blocking materialover a layer of first radiation sensitive material, such as photoresist.The radiation blocking material is patterned to provide a first openingtherein that uncovers a portion of the layer of radiation sensitivematerial. Next, the layered structure is irradiated in accordance withan exposure pattern that overlaps a portion of the first opening,thereby irradiating a region of the lower radiation sensitive material.The radiation sensitive material is then developed to remove theirradiated region thereof and form an opening for the mask.

[0010] In accordance with one aspect of this embodiment, a second layerof radiation sensitive material, e.g., photoresist, is layered over thelayer of radiation blocking material and patterned to provide alongitudinal opening therein and uncover a corresponding region of theradiation blocking material. A visible portion of the radiation blockingmaterial is removed using the patterned, second layer of radiationsensitive material as a mask, thereby forming the first opening in theradiation blocking material.

[0011] Preferably, the second layer of radiation sensitive material isprovided a longitudinal opening, and the lower layer of radiationsensitive material is irradiated using a lateral exposure strip thatoverlaps the longitudinal opening.

[0012] In accordance with one aspect of the invention, a DARC(dielectric antireflective coat) layer is provided between the lightblocking material and the second photoresist.

[0013] In a further embodiment of the present invention, a mask, asoutlined above, is formed over a substrate. Again, the second layer ofradiation sensitive material has been patterned to provide alongitudinal opening, and lower layer of radiation sensitive materialirradiated using a lateral exposure strip that overlaps the longitudinalopening to provide for a rectangular overlap region. The exposed,rectangular overlap region is developed to provide a mask aperturehaving a rectangular outline. Through this mask aperture, select regionsof the substrate are etched to form a container therein with arectangular cross-section corresponding to the rectangular outline ofthe mask aperture.

[0014] In accordance with one aspect of this embodiment, a capacitor isformed within the container, thereby providing a container-cellcapacitor with a rectangular cross-section.

[0015] In accordance with yet another embodiment of the presentinvention, a mask comprises a layer of first photoresist, a layer oflight blocking material over the first photoresist, and secondphotoresist over the light blocking material. A dielectricantireflective coat (DARC) is provided over the light blocking materialand beneath the second photoresist. In accordance with one aspect ofthis embodiment, at least one of the first and second photoresists ispatterned per a longitudinal exposure strip, and the other per a lateralexposure strip. The first one comprises an opening corresponding to thelongitudinal exposure strip, and the other an opening corresponding toan overlap of the longitudinal and lateral exposure strips.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The present invention will be understood from reading thefollowing description of particular embodiments, with reference to theattached drawings as illustrated below, where:

[0017] FIGS. 1-3 are partial, cross-sectional, isometric viewsrepresentative of a known method of forming a known mask and cylindricalcontainer;

[0018] FIGS. 4A-4B show planar and exploded views illustrating generallya mask over a substrate;

[0019]FIG. 5A provides a partially sectioned, isometric view of a priorart mask and container;

[0020]FIG. 5B is a planar view of FIG. 5A, illustrating generally a maskaperture over an underlying substrate;

[0021] FIGS. 6-10 provide exemplary, isometric and cross-sectional viewsillustrating generally fabrication of a mask in accordance with anembodiment of the present invention; and

[0022] FIGS. 11-14 provide exemplary cross-sectional isometric viewsillustrating, generally, fabrication of a container-cell capacitor inaccordance with an embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] The present invention proposes a mask with a rectangular opening,and a new method of forming such mask which can facilitate an easyprocess flow that can be used, for example, in production of DynamicRandom Access Memory.

[0024] In accordance with an exemplary embodiment of the presentinvention, skipping forward with reference to FIG. 10, mask 12 comprisesfirst and second layers 65,68 of radiation sensitive material separatedby a layer 66 of radiation blocking material. In accordance with oneaspect of this embodiment, layers 65,68 comprise known photoresist ofabout 0.5-1.0 μm thickness and layer 66 comprises a metal, for example,aluminum, of less than 1000 angstroms thickness, and more preferablybetween 500 and 600 angstroms. In an alternative exemplary embodiment,referencing FIG. 6A, layer 66′ further comprises a dielectricantireflective coat (i.e., DARC) layered adjacent light blockingmaterial 84. In one aspect of this exemplary embodiment, a DARC layer 85is formed over the layer of radiation blocking material 84 and belowphotoresist 68. In a further aspect of this exemplary embodiment, a DARClayer 83 is also provided over photoresist 65 and beneath the layer ofradiation blocking material 84. For these exemplary embodiments, DARClayer comprise a material and thickness—e.g., α—Si or Si_(x)O_(y)N_(z)of about 200-1000 angstroms—appropriate for minimizing reflections ofthe associated process irradiation, e.g., ultraviolet light.

[0025] Turning to a method of forming such mask, with reference to FIGS.6-11, first photoresist 65 is layered over substrate 21, with athickness of about 3000-10,000 angstroms. Again, the term “substrate” or“semiconductor substrate” will be understood to mean any constructioncomprising semiconductor material, including but not limited to bulksemiconductive materials such as a semiconductor wafer (either alone orin assemblies comprising other materials thereon), and semiconductivematerial layers (either alone or in assemblies comprising othermaterials). Further, the term “substrate” also refers to any supportingstructure including, but not limited to, the semiconductive substratesdescribed above.

[0026] Further referencing FIG. 6, layer 66 comprises radiation (e.g.,light) blocking material and is deposited over first photoresist 65. Inan exemplary embodiment, the photoresist is sensitive to ultravioletlight and the radiation blocking material opaque to the ultravioletlight. In accordance with such embodiment, the radiation blockingmaterial comprises a metal, for example, aluminum of 200-1,000 angstromsthickness. Next, another layer of photoresist 68 (preferably sensitiveto ultraviolet light) is layered over layer 66 of the radiation blockingmaterial.

[0027] As discussed above in accordance with certain exemplaryembodiments, a dielectric antireflective coat 85 can be formed on thelayer of radiation blocking material 84, as shown in FIG. 6A, forprovision beneath photoresist 68. Additionally, a dielectricantireflective coat 83 might also be formed over photoresist 65 forprovision beneath radiation blocking material 84.

[0028] Preferably, the material(s) of layer 66, or 66′, are formed overphotoresist 65 under conditions preserving the integrity of lowerphotoresist 65. For example, the DARC and/or radiation blocking materiallayers should be deposited using known chemical vapor deposition orsputtering methods at temperatures less than 200° C.

[0029] With reference to FIG. 7, the upper layer of a photoresist 68 isirradiated 70, in a preferred embodiment using ultraviolet light, usinga reticle (not shown) to pattern a longitudinal irradiated region orexposure strip 72 on photoresist 68. The irradiated region of thephotoresist is developed to form longitudinal opening 74 therein asshown in FIG. 8. Opening 74 uncovers a corresponding surface region oflayer 66 comprising radiation blocking material. Using the patterned,upper photoresist 68 as a mask, the uncovered region 76 of layer 66 isetched—e.g., using a reactive ion plasma 78—until reaching anduncovering a corresponding portion of the lower photoresist 65. In anexemplary embodiment, layer of radiation blocking material is etchedusing a known anisotropic etchant. Additionally, a brief isotropicfinishing etch may be employed after the anisotropic etch so as toremove undesirable “stringers” or “slivers”, which may not havecompletely cleared the etch window of the preceding anisotropic etch.

[0030] Continuing with reference to FIG. 9, another exposure 82irradiates a lateral exposure strip 80 of the layered substratestructure and exposes region 86 of lower photoresist 65. Exposed region86 of photoresist 65 is defined by where lateral exposure strip 80overlaps longitudinal opening 74. Preferably, lateral exposure strip 82overlaps longitudinal opening 74 with its primary axis perpendicular tothat of the longitudinal opening. The photoresist is then developed toremove its irradiated region 86, thereby providing mask 12 with anopening 18 as shown in FIG. 10. In accordance with an alternativeexemplary embodiment, the upper layer of photoresist 68 can be removed(leaving light blocking material 66) before the exposure and patterningof the lower layer photoresist 65.

[0031] In the exemplary embodiment depicted by FIG. 10, opening 18 has arectangular outline that exposes a corresponding region 92 of substrate21. Accordingly, the select visible region 92 of substrate 21 can thenbe processed, as permitted through opening 18 of mask 12. In aparticular exemplary embodiment, select region 92 of substrate 21 isetched through opening 18 of mask 12, so as to form a void, pocket,hole, contact opening, via or container (hereinafter container) withinthe substrate having an outline corresponding to that of mask opening18. In alternative exemplary applications, mask 12 can be used duringdeposition or implant of the select region 92 of substrate 21.

[0032] Moving on to a particular, exemplary embodiment, with referenceto FIG. 11, substrate 21 comprises a known silicon wafer 24 that hasalready been processed through some of the steps in the production of adynamic random access memory. Field-oxide regions 25 isolate variousactive regions of wafer 24. Wordlines 26 are disposed across the surfaceof wafer 24. The wordlines comprise poly 32 covered with silicide 34,both encapsulated by insulating materials of cap 36 and sidewalls 38.Cap 36 and sidewalls 38 prevent the silicide 34 and poly 32 of wordlines26 from contacting and electrically shorting to neighboring electricallyconductive plugs 54,56,58. Diffusion nodes 30 have been doped to provideelectrically conductive regions within silicon wafer 24. Plugs 54,56,58comprise electrically conductive material which electricallyinterconnect to their respective diffusion nodes 30. Insulatingmaterials 41,50,64 around the walls of plug 56, serve to insulate plug56 from adjacent plugs 54,58. Insulating material 40, disposed above andbetween certain wordlines over the field-oxide isolation regions 25,serve to separate the various memory cell units from their adjacentother memory cell units. Insulating material 10 overlays wafer 24 andits various wordline and plug structures. In an exemplary embodiment,insulating material 10 comprises an oxide such as borophosphosilicateglass (BPSG) or tetraethylorthosilicate (TEOS) deposited silicon.Preferably, the outwardly facing surface 9 of insulating material 10 hasbeen planarized, for example, by a known planarization proces such aschemical-mechanical-polishing (CMP).

[0033] Moving on to FIGS. 12-13, mask 12 (of a particular embodiment ofthe present invention as described above) is formed over substrate 21.An anisotropic plasma etch is used to etch exposed regions 92 ofinsulating material 10 of substrate 21. The etch continues sufficientlyuntil exposing portions of plugs 58,54, thereby forming containers 19 ofgenerally rectangular outlines 23 corresponding to the outlines ofopenings 18 of mask 12. Upon forming containers 19, mask 12 is removed.

[0034] The protective materials of cap 50 and spacers 64 are differentfrom insulating material 10 so that insulating material 10 can be etchedmore favorably relative (selective to) cap 50 and spacers 64.Accordingly, the protective cap 50 and spacers 64 keep plug 56 isolatedfrom the neighboring containers 19. In one exemplary embodiment, wheninsulating material comprises oxide, protective cap 50 and spacers 64comprise nitride.

[0035] Continuing with reference to FIG. 14, electrically conductivematerial 110 is layered within containers 19, using a known depositionprocedure. In an exemplary embodiment, conductive material 110 compriseshemispherical grain (HSG) polysilicon and is deposited before removal ofmask 12. These conductive linings in containers 19 will serve as storagenode electrodes for the resulting container-cell capacitors to be formedtherein. Dielectric 111, for example, silicon nitride or tantalumpentoxide, is then deposited over conductive material 110. Finally,electrically conductive material 112 is deposited over dielectric 111,providing upper electrodes for capacitors 42,46. By way of the presentinvention, container-cell capacitors 42,46, have been formed incontainers of rectangular or square cross-section, thereby providinggreater electrode areas over that which would otherwise be available forcylindrical containers as represented by phantom lines 17 of FIG. 13.

[0036] U.S. patent application Ser. No. 09/076,324 entitled “Methods ofElectrically Contacting to Conductive Plugs, Methods of Forming ContactOpenings, and Methods of Forming Dynamic Random Access MemoryCircuitry”, (97-1200), and U.S. Pat. No. 5,651,855 and 5,858,877, herebyincorporated by reference, provide exemplary known etching anddeposition chemistries.

[0037] Accordingly, the present invention provides a mask and method offorming such mask with a fine geometry, rectangular aperture. Further,such mask can be used to form a container of rectangular cross-sectionwithin a substrate. Additionally, a container-cell capacitor can beformed within the container to provide a capacitor of electrode area andcapacitance greater than that of a similar diameter cylindricalcontainer.

[0038] Although the foregoing invention has been described in certainpreferred embodiments, other embodiments will become apparent, in viewof the disclosure herein. Accordingly, the scope of the invention is,therefore, indicated by the independent claims rather than by theforegoing description. All changes thereto which come within the meaningand range of the equivalency of the claims are to be embraced within thescope of the claims.

What is claimed is:
 1. A mask comprising: a first layer of photoresist;a layer of radiation blocking material disposed over said firstphotoresist; and a second layer of photoresist over said radiationblocking material.
 2. A mask according to claim 1 , wherein saidradiation blocking material comprises metal.
 3. A mask according toclaim 2 , wherein said metal has a thickness of at least 200 angstroms.4. A mask according to claim 2 , further comprising a dielectricanti-reflective coating over said metal and beneath said secondphotoresist.
 5. A mask according to claim 4 , wherein said dielectricanti-reflective coat comprises a material and thickness selected to benon-reflective of ultraviolet light.
 6. A mask according to claim 5 ,wherein at least one of said first and second photoresists has athickness in a range of about 3,000-10,000 Å.
 7. A mask according toclaim 5 , wherein said dielectric anti-reflective coating has athickness in the range of about 200-1,000 Å.
 8. A mask according toclaim 5 , wherein said first and said second photoresists arephotosensitive to ultraviolet light.
 9. A mask according to claim 1 ,wherein said radiation blocking material comprises metal, said maskfurther comprising a dielectric anti-reflective coat over and againstsaid metal.
 10. A mask according to claim 9 , wherein said metal has athickness less than about 1,000 angstroms
 11. A mask according to claim1 , wherein said first and said second photoresist layers have beenpatterned per a longitudinal exposure strip and a lateral exposurestrip, one of said first and second photoresist layers having wallsdefining an opening corresponding to one of said longitudinal exposurestrip and said lateral exposure strip, and the other of said first andsaid second photoresist layers having walls defining an opening thereincorresponding to an overlap region of said longitudinal exposure stripand said lateral exposure strip.
 12. A mask according to claim 11 ,wherein at least one of said longitudinal and said lateral exposurestrips has a width less than about 0.5 μm.
 13. A mask according to claim11 , wherein said radiation blocking material comprises walls definingan opening therein corresponding to one of said longitudinal and saidlateral exposure strips.
 14. A method of fabricating a mask, comprising:providing a first layer of photoresist; layering a radiation blockingmaterial over said first layer of photoresist; layering masking materialover said radiation blocking material; removing a region of said maskingmaterial and providing a first opening therein that reveals a portion ofsaid radiation blocking material; through said first opening, removing aportion of said radiation blocking material and uncovering a region ofsaid first layer of photoresist; irradiating with a light pattern, aportion of the uncovered region of said first layer of photoresist wheresaid light pattern overlaps said first opening; and removing saidirradiated portion of the first layer of photoresist.
 15. A method offabricating a mask according to claim 14 , wherein said masking materialcomprises photoresist, and said step of removing a portion of saidmasking material comprises steps of: irradiating said photoresist per alongitudinal exposure strip, and removing the irradiated portion of saidphotoresist to define a longitudinal opening therein.
 16. A methodaccording to claim 15 , wherein at least one of said irradiating stepsemploys ultraviolet light.
 17. A method according to claim 15 , whereinsaid light pattern for irradiating said furst layer of photoresistprovides a lateral exposure strip overlapping the longitudinal opening.18. A method according to claim 17 , wherein at least one of saidlongitudinal and said lateral exposure strips has an exposure width lessthan about 0.5 μm.
 19. A method according to claim 18 , wherein saidlateral exposure strip has a primary axis substantially perpendicular toa primary axis of said longitudinal opening.
 20. A method according toclaim 15 , wherein said step of removing a region of said radiationblocking material employs a step of anisotropic plasma etching.
 21. Amethod according to claim 14 , wherein said layering of the radiationblocking material comprises the steps of: forming a layer of metal oversaid first photoresist; and forming a dielectric anti-reflective coatingon said layer of metal.
 22. A method according to claim 21 , whereinsaid layer of metal is formed with a thickness between 200 and 1,000angstroms
 23. A method of processing a substrate, comprising the stepsof: coating photoresist on said substrate; forming light blockingmaterial over said first photoresist; coating photoresist over saidlight blocking material; patterning said photoresist of said lightblocking material to provide an opening therein that exposes a portionof said light blocking material corresponding to a first pattern;through the opening in said photoresist, removing a portion of saidlight blocking material and uncovering a region of said firstphotoresist; irradiating, in accordance with a second pattern, at leasta portion of said uncovered region of said photoresist on saidsubstrate; developing and removing the irradiated portion of saidphotoresist on said substrate to form an aperture therein; andprocessing a region of said substrate through said aperture.
 24. Amethod according to claim 23 , wherein said step of patterningcomprises: irradiating a longitudinal strip of said photoresist, anddeveloping said photoresist layer to remove the irradiated longitudinalstrip thereof, and form a longitudinal opening therein.
 25. A methodaccording to claim 24 , wherein said irradiatting with the secondpattern irradiates with at least one lateral strip that overlaps saidlongitudinal opening.
 26. A method according to claim 25 , wherein saidlateral strip extends primarily perpendicular to said longitudinalopening.
 27. A method according to claim 23 , wherein said etching ofsaid substrate comprises anisotropic plasma etching to remove portionsof said substrate through the aperture of the overlying photoresist. 28.A method according to claim 23 , wherein said step of irradiatingemploys ultraviolet light.
 29. A method according to claim 23 , whereinsaid step of forming the light blocking layer comprises: depositingmetal against said photoresist; and forming a dielectric anti-reflectivecoating on said metal.
 30. A method according to claim 29 , in whichsaid metal is provide a thickness of about 200 to 1,000 angstroms.
 31. Amethod of fabricating a container cell capacitor for a semiconductordevice, comprising the steps of: providing a substrate having a layer ofinsulating material; layering a first layer of photoresist over saidinsulating material; forming a light blocking layer over said firstlayer of photoresist; forming a second layer of photoresist over saidlight blocking layer; irradiating a region of said second layer ofphotoresist in accordance with a first exposure pattern; developing andremoving the irradiated region of said second layer of photoresist toprovide an opening therein corresponding to said first exposure pattern;through said opening, removing a portion of said light blocking layerand uncovering a portion of said first layer of photoresist;irradiating, in accordance with a second exposure pattern, a region ofsaid uncovered portion of said first layer of photoresist; developingand removing said irradiated region of said first layer of photoresist,to provide an opening therein that exposes a portion of said insulatingmaterial; etching a portion of said insulating material through saidopening of the first layer of photoresist, and forming a containertherein; and fabricating a capacitor within said container.
 32. A methodaccording to claim 31 , wherein said step of fabricating a capacitorcomprises: lining said container with electrically conductive material;forming dielectric material on said electrically conductive material;and depositing electrically conductive material over said dielectricmaterial.
 33. A method according to claim 32 , wherein said firstexposure pattern includes a longitudinal exposure strip and said step offirstly irradiating comprises irradiating with UV radiation a respectivelongitudinal exposure strip region of said second layer of photoresist,and wherein said second exposure pattern includes a lateral exposurestrip and said step of secondly irradiating comprises illuminating withUV radiation select regions of said second layer of photoresist and saiduncovered first layer of photoresist per said at least one lateralexposure strip, said at least one lateral exposure strip overlapping andextending primarily perpendicular to said at least one longitudinalexposure strip.
 34. A method according to claim 33 , wherein said atleast one longitudinal exposure strip has a width less than about 0.5μm.
 35. A method according to claim 34 , wherein said at least onelateral exposure strip has a width less than about 0.5 μm.
 36. A methodaccording to claim 35 , wherein said step of etching the insulatingmaterial comprises anisotropic plasma etching.
 37. A method according toclaim 36 , wherein said insulating material has a given depth, and saidstep of etching comprises etching a portion of said insulating materialto about said given depth.
 38. A method according to claim 37 , furthercomprising a step of layering at least one of tetraethylorthosilicate(TEOS) silicon dioxide and borophosphosilicate glass (BPSG) over saidsubstrate as said insulating layer.
 39. A method according to claim 31 ,wherein said step of forming the light blocking layer comprises thesteps of: layering metal over said first layer of photoresist; andcoating a dielectric anti-reflective material over said metal.
 40. Amethod according to claim 39 , wherein said metal is provided athickness between 200 and 1,000 angstroms.
 41. A method according toclaim 40 , in which the dielectric anti-reflective coat is formed with athickness between 200 and 1,000 angstroms.
 42. A method of forming amask comprising the steps of: coating photoresist over a substrate;depositing masking material over said photoresist; forming alongitudinal slot in said masking material and uncovering a region ofsaid photoresist corresponding to said longitudinal slot; irradiating aportion of said uncovered region of said photoresist; and developing andremoving the irradiated portion of said photoresist to provide a maskopening therein.
 43. A method according to claim 42 , wherein said stepof forming the longitudinal slot comprises the steps of: coating asecond layer of photoresist over said masking material; patterning saidsecond layer of photoresist and defining a longitudinal opening thereinthat exposes a corresponding region of said masking material; andremoving exposed regions of said masking material through thelongitudinal opening of said second layer of photoresist.
 44. A methodaccording to claim 43 further comprising a step of removing said secondlayer of photoresist before said step of irradiating.
 45. A methodaccording to claim 44 , wherein said step of irradiating employs anexposure pattern providing a lateral exposure strip that overlaps aportion of said longitudinal slot.
 46. A method according to claim 45 ,wherein said lateral exposure strip has a primary axis substantiallyperpendicular to that of said longitudinal slot.
 47. A method accordingto claim 46 , wherein the overlap of said lateral exposure strip andsaid longitudinal slot define a rectangular region for the irradiatedportion of said photoresist.
 48. A method according to claim 47 ,wherein said mask opening comprises a rectangular outline correspondingto the rectangular region that was defined by the overlap of saidlateral exposure strip and said longitudinal slot, said method furthercomprising a step of etching said substrate through said mask openingand forming a container in said substrate having a cross-sectioncorresponding to the rectangular outline of said mask opening.
 49. Amethod according to claim 43 , further comprising a step of forming adielectric anti-reflective coating over said masking material beforesaid step of coating the second photoresist.
 50. A method according toclaim 49 , wherein said dielectric anti-reflective coating is selectedto reduce reflection of UV light.
 51. A method according to claim 43 ,further comprising a step of providing an optical antireflective layerbeneath at least one of said photoresists.
 52. A method according toclaim 42 , further comprising a step of etching said substrate throughsaid mask opening.
 53. A method according to claim 42 , wherein saidmasking material is opaque.
 54. A method according to claim 42 , whereinsaid step of irradiating employs an exposure pattern that provides alateral exposure strip that overlaps said longitudinal slot.
 55. Amethod according to claim 54 , wherein said lateral exposure strip has aprimary axis substantially perpendicular to that of said longitudinalslot.
 56. A method according to claim 55 , wherein said lateral exposurestrip overlaps said longitudinal slot to define a rectangular area forthe irradiated portion of said photoresist.
 57. A method of processing asubstrate comprising the steps of: providing a layer of firstphotoresist over a substrate; providing a layer of light blockingmaterial over said first layer of photoresist; forming a longitudinalgroove within said layer of light blocking material; irradiating alateral strip of said layered substrate and exposing a portion of saidfirst photoresist where said lateral strip overlaps said longitudinalgroove; developing and removing the exposed portion of said first layerof photoresist so as to define a mask opening therein; and processing aselect region of said substrate, said select region defined inaccordance with said mask opening.
 58. A method according to claim 57 ,wherein said lateral strip has a primary axis that is substantiallyperpendicular to that of said longitudinal groove.
 59. A methodaccording to claim 57 , wherein said step of processing comprises a stepof etching the select region of said substrate.
 60. A method accordingto claim 59 , in which said step of etching includes forming a containerin said substrate, said container having a cross-section correspondingto an outline of the mask opening.
 61. A method according to claim 57 ,wherein said step of processing comprises doping the select region ofsaid substrate.
 62. A method according to claim 57 , wherein said stepof forming a longitudinal groove comprises the steps of: providing asecond layer of photoresist over said light blocking material;photolithographically processing said second layer of photoresist todefine a longitudinal opening therein that exposes a correspondingportion of said light blocking material; and removing exposed portionsof said light blocking material through the longitudinal opening of saidsecond layer of photoresist and providing said longitudinal groove. 63.A method according to claim 62 , further comprising a step of removingsaid second layer of photoresist before said step of irradiating thelateral strip of said layered substrate.
 64. A method according to claim62 , wherein said step of forming the longitudinal groove comprisesuncovering a portion of said first layer of photoresist.
 65. A methodaccording to claim 62 , further comprising a step of providing adielectric anti-reflective coating over said light blocking material andbeneath said second layer of photoresist.
 66. A method according toclaim 62 , further comprising a step of providing a non-reflective layerbeneath at least one of said first and said second photoresists.
 67. Amethod according to claim 66 , wherein said non-reflective layer isselected to be non-reflective of ultraviolet light.
 68. A methodaccording to claim 60 , further comprising a step of forming a capacitorin said container.
 69. A method according to claim 68 , wherein saidstep of forming a capacitor comprises: lining said container with afirst layer of conductive material; forming dielectric conformablyagainst said first layer of conductive material; and depositingconductive material over said dielectric.
 70. A method according toclaim 57 , further comprising a step of planarizing said substrate. 71.A mask comprising: a layer of photoresist, said photoresist having wallsdefining a rectangular opening therein; and a layer of opaque materialover said photoresist, walls of said opaque material defining alongitudinal groove through which a portion of said rectangular openingis visible.
 72. A mask according to claim 71 , wherein a width of saidrectangular opening is less than 0.5 μm, and said longitudinal groovecomprises a length greater than said width.
 73. A mask according toclaim 72 , wherein said rectangular opening has a width less than 0.5 μmand a length less than 0.5 μm.
 74. A mask according to claim 71 ,wherein at least one wall of said mask opening is substantiallyperpendicular to at least one wall of said longitudinal groove.
 75. Amask according to claim 71 , wherein said opaque material comprisesradiation blocking material.
 76. A mask according to claim 75 , furthercomprising a dielectric anti-reflective coating on said radiationblocking material.
 77. A mask according to claim 76 , wherein saidradiation blocking material comprises metal.
 78. A mask according toclaim 76 , wherein said radiation blocking material comprises metal ofthickness less than 1000 Å, and said dielectric anti-reflective coatingis selected to be non-reflective of ultraviolet light.
 79. A maskaccording to claim 71 , wherein said layer of opaque material has athickness and said longitudinal groove a depth up to said thickness. 80.A method of processing a substrate, comprising the steps of: layering asubstrate with a first layer of resist; forming mask material over saidfirst layer of resist, said mask material being opaque and having wallsdefining a groove; forming an opening in said first layer of resist,said opening visible through the groove of said mask material; andtreating a select region of said substrate through said opening.
 81. Amethod according to claim 80 , in which said treating comprises a stepof implanting the select region of said substrate.
 82. A methodaccording to claim 80 , in which said treating comprises a step ofremoving a portion of said substrate defined in accordance with saidopening.
 83. A method according to claim 82 , wherein said step ofremoving includes etching.
 84. A method according to claim 82 , whereinsaid step of removing includes a step of anisotropic plasma etching. 85.A method according to claim 80 , wherein said treating comprises thesteps of: exposing a region of said substrate to an anisotropic plasma,said region defined by said opening of the first layer of resist; andetching a portion of said substrate exposed to said plasma to form acontainer therein with an outline defined by said opening.
 86. A methodaccording to claim 85 , further comprising a step of forming a capacitorin said container.
 87. A method according to claim 80 , in which saidgroove has a width less than 0.5 μm.
 88. A method according to claim 87, in which said opening has a width substantially equal to that of saidgroove.
 89. A method according to claim 88 , wherein said opening isformed with a pair of walls substantially perpendicular to a primaryaxis of said groove.
 90. A method according to claim 80 , wherein saidmask material comprises metal.
 91. A method according to claim 90 ,further comprising the steps of: forming a second layer of photoresistover said metal; patterning said second layer of photoresist to define aslot; and etching a portion of said metal through said slot to providesaid groove.
 92. A method of fabricating a capacitor for a DRAM device,comprising the steps of: providing a semiconductor substrate; forming alayer of insulating material over said substrate; forming a first layerof photoresist over said insulating material; forming a layer of maskmaterial over said first layer of photoresist; forming a first groove insaid layer of mask material and uncovering a corresponding region ofsaid first layer of photoresist; exposing per a radiation pattern aportion of the uncovered region of said first layer of photoresist;developing and removing the irradiated portion of said first layer ofphotoresist to provide an aperture therein; etching a region of saidinsulating material in accordance with said aperture to form a containerin said layer of insulating material; and forming a capacitor withinsaid container.
 93. A method according to claim 92 , wherein said stepof forming the capacitor comprises the steps of: lining said containerwith a conformal layer of electrically conductive material; formingdielectric conformably over said electrically conductive material; anddepositing electrically conductive material over said dielectric.
 94. Amethod according to claim 92 , wherein said step of exposing per theradiation pattern comprises irradiating with a strip of lightsubstantially perpendicular to said first groove.
 95. A method accordingto claim 92 , wherein said first layer of photoresist is selected to bephotosensitive to ultraviolet light.
 96. A method according to claim 95, wherein said layer of mask material comprises photoresist.
 97. Amethod according to claim 92 , wherein said forming the groove in saidlayer of mask material comprises the steps of: layering photoresist oversaid layer of mask material; patterning the photoresist to form alongitudinal slot therein; and removing portions of said layer of maskmaterial using the patterned photoresist as a mask to form said groovein said layer of mask material, said groove formed with an outlinedefined in accordance with the longitudinal slot of the patternedphotoresist.
 98. A method according to claim 97 , further comprising astep of removing the patterned photoresist before said step of exposingthe first layer of photoresist.
 99. A method according to claim 92 ,wherein said mask material is selected to be opaque to ultravioletlight, and said first photoresist is selected to be photosensitive toultraviolet light.